BE SEM VI (EC) DIV A,B SYLLABUS FOR REMEDIAL MID SEM EXAM APRIL 2017 SUBJECT- 2161001 - VLSI TECHNOLOGY & DESIGN

BE SEM VI (EC) DIV A,B

SYLLABUS FOR REMEDIAL MID SEM EXAM APRIL 2017

SUBJECT- 2161001 - VLSI TECHNOLOGY & DESIGN

CH-1-INTRODUCTION

CH-2-FABRICATION OF MOSFETS

CH-3-MOS TRANSISTOR

CH-5-MOS INVERTER STATIC CHARATERISTICS

CH-6-MOS INVERTER SWITCHING CHARATERISTICS

CH-7-COMBINATIONAL MOS LOGIC CKTS

CH-8-SEQUENTIAL MOS LOGIC CIRCUITS

CH-9-DYNAMIC LOGIC CIRCUITS

CH-10- CHIP I/P AND O/P CIRCUITS ( AS PER GTU SYLLABUS)

CH-15- DESIGN FOR TESTABILITY( AS PER GTU SYLLABUS)

BOOK:

CMOS DIGITAL INTEGRATED CKTS BY KANG & LEBLEBICI,Tata McGraw Hill,3^rdedition,2003

FACULTY:

PROF.M.V.SHAH

PROF.A.B.NANDURBARKAR

PROF.P.P.PRAJAPATI